System clock switch circuit of a computer main board

Details System clock switch circuit of a computer main board System clock switch circuit of a computer main board

1998-09-03

2001-01-16

De Cady, Albert (Department: 2787)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S322000, C713S400000, C713S501000

Reexamination Certificate

active

06175929

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 87109584, filed Jun. 16, 1998, the full disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a system clock switch circuit of a computer main board, and more particularly, to a system clock switch circuit of a computer main board that simultaneously sends out a reset signal and the frequency of the system clock changes. The reset signal restarts the computer with the new frequency, and prevents the computer from malfunctioning due to the non-synchronization between the computer main board and peripherals.
2. Description of Related Art
Since disclosure of the architectures of the IBM-compatible AT and XT personal computers to industry, the performance and the architectures of personal computers have been improved and modified by the entire computer industry in many ways. The major progress made on personal computers over the years includes upgrading the frequency of the central processing unit (CPU) clock, which started at 4.77 MHz and now exceeds 300 MHz. Because the frequency of the CPU is far beyond the clock frequency of a modern computer main board, every CPU contains two different frequencies, an internal frequency and an external frequency, wherein the external frequency is the same as the clock frequency of the computer main board. Currently, the clock frequencies of computer main boards used in industry include the standard 66 MHz and 100 MHz, and non-standard 75 MHz and 83 MHz.
Even though the clock frequency of a computer main board is selective, some peripherals still need to work under fixed frequencies. For example, a peripheral component interconnect (PCI) interface can only work at a frequency of 33 MHz and an accelerated graphics port (AGP) interface can only work at a frequency of 66 MHz. Hence, the ratio between the clock frequency of a computer main board and the clock frequency of a peripheral has to be considered when the clock frequency of the computer main board changes. For instance, in the case that the system clock frequency of a computer main board is 100 MHz, the clock frequency of an AGP interface is two thirds the system clock frequency, and the clock frequency of a PCI interface is one third the system clock frequency. If the system clock frequency is 66 MHz, the clock frequency of an AGP interface is equal to the system clock frequency, and the clock frequency of a PCI interface is one half the system clock frequency.
A block diagram representing a conventional computer main board is shown in
FIG. 1
, wherein the computer main board includes a CPU
110
, a chipset
120
, a PCI interface
130
, an AGP interface
140
, a clock generator
150
, a frequency switch circuit
160
, and a startup circuit
170
. CPU
110
handles the operation of the entire computer main board. Chipset
120
is a single integrated circuit (IC) chip that contains all the integrated control circuits of the computer main board. So, a CPU communicates with peripherals on the computer main board, such as the PCI interface
130
and AGP interface
140
, through the chipset
120
.
Users can change the system clock frequency of a computer main board
100
through a frequency switch circuit
160
. In an earlier design of a computer main board, jumps are used to set and change the system clock frequency. Since jumps must be set manually, which is not very convenient, a jumperless-setting design that combines software setup and hardware circuit is now used on most computer main boards.
Clock generator
150
provides clock signals CLK, AGP_CLK, and PCI_CLK, which are then sent to the chipset
120
, the AGP interface
140
, and the PCI interface
130
, respectively. The clock generator
150
can be controlled by either hardware settings or commands from CPU
110
. Currently, the most widely used controlling bus is an inter-integrated circuit (I
2
C) bus introduced by Philips, wherein the I
2
C bus needs at least three signal lines, the data line, the clock line, and the reference ground line, to operate. Every peripheral connected to the I
2
C bus has with a unique ID code, so it is easy to hook up peripherals to an I
2
C bus.
Because the clock generator
150
can be controlled by commands from CPU
110
, the system clock frequency of a computer main board can be set through software as well. Because the system clock frequency can be changed, chipset
120
determines the current system clock frequency through a lead {overscore (MAB)}, and determines the ratio of a peripheral, such as a PCI interface or an AGP interface, to the system clock frequency. f the information about system clock frequency obtained through {overscore (MAB)} is not correct, the frequency used by the chipset
120
to communicate with peripherals is then accordingly incorrect and that causes system malfunction.
In addition, because the number of leads on the chipset
120
is limited by its size, a lead is used for different purposes at different moments. Chipset
120
only obtains information about the system clock frequency through the {overscore (MAB)} when a reset signal RST is received, and then chipset
120
uses lead {overscore (MAB)} for something else after the system starts, wherein the RST is provided by the startup circuit
170
to handle resetting the system. Because chipset
120
only determines the system clock frequency after receiving a reset signal RST, if a RST is not sent after the system clock frequency is changed, chipset
120
is then not able to find out the change in the system clock frequency.
On the other hand, because the frequency multiplying circuit within CPU
110
is not able to respond to status, the clock generator
150
gradually change the system clock frequency to a desired one after a command tp change frequency is received. As shown in
FIG. 2A
, the system clock frequency is changed from 66 MHz at t
1
to 100 MHz at t
2
after the clock generator
150
receives a command to change system clock frequency. However, the frequencies of peripherals, such as PCI and AGP interfaces, are simply obtained by dividing the system clock frequency by fixed ratios. In result, the frequencies at the peripheral interfaces change steeply after a command to change frequency is received by the clock generator, and then gradually relapse, as shown in FIG.
2
B. The clock signal CLK at the peripheral interface due to a steep frequency change is shown in
FIG. 2C
, which causes system malfunctions, such as a glitch, or even system lockup, after the time t
1
.
FIGS. 3A
to
3
C show the other cases where frequency changes from 100MHz to 66MHz during the time t
1
to t
2
. Similarly, system malfunction, such as a glitch or even system lockup, happens after the time t
1
.
According to the foregoing description, a conventional frequency switching method for a computer main board has the following drawbacks:
1. When the frequency from the clock generator changes, a reset signal is not simultaneously sent to the chipset to notify the chipset of the change in the frequency. The chipset is not able to communicate with peripherals with the proper frequency, and that causes system malfunctioning.
2. As soon as the clock generator receives a command to change frequency, it gradually changes the system clock frequency, while it immediately changes the frequency ratio. The frequency ratio change causes steep frequency changes at peripheral interfaces, and that leads to system malfunctioning, such as a glitch or even system lockup.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a system clock switch circuit for a computer main board that simultaneously sends out a reset signal with the change in the system clock frequency from the clock generator. The chipset is capable of communicating with peripherals at correct frequencies to ensure that the system works properly.
It is another an objective of the present invention to provide a system clock switch circuit for a compu

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