System clock power management for chips with multiple...

Details System clock power management for chips with multiple... System clock power management for chips with multiple...

2006-05-09

2006-05-09

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

Reexamination Certificate

active

07043649

ABSTRACT:
A system and method are disclosed for controlling the frequency of a common clock which is shared by a plurality of processing elements. The usage of the common clock by each of the plurality of processing elements is measured, and the common clock is controlled to have a frequency determined as a function of the measured common clock usage by the plurality of processing elements.

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