System bus termination status detection

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

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Details

326 16, H03K 1900, H03K 1716

Patent

active

055834485

ABSTRACT:
A system has the capability to determine the termination status of a data-communication bus therein. The system includes a source of a bus signal from a bus, a selectively activated current sink that communicates with the source of the bus signal, with a detection activation input, and a source of a detection signal in communication with the detection activation input of the current sink. There is a source of a first reference voltage, and a source of a second reference voltage, the second reference voltage being less than the first reference voltage. A high-termination comparator has an upper voltage input that communicates with the source of the bus signal, a lower voltage input that communicates with the source of the first reference voltage, and a logical high-termination output. A low-termination comparator has a lower voltage input that communicates with the source of the bus signal, an upper voltage input that communicates with the source of the second reference voltage, and a logical low-termination output. The detection circuitry is activated by applying a voltage through the source of the detection signal when the bus is idle and a near-end, local termination of the bus is disconnected, and monitoring the logical high-termination and the logical low-termination outputs.

REFERENCES:
patent: 4748426 (1988-05-01), Stewart
patent: 4841232 (1989-06-01), Graham et al.
patent: 5434516 (1995-07-01), Kosco
patent: 5473264 (1995-12-01), Mader et al.
Bill Stanley, "Automatic Termination Method 2", Adaptec Corporation Plug and Play SCSI Workship, Jun. 8, 1994, pp. 5-8.

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