System architecture

Details System architecture System architecture

2000-06-22

2003-12-09

Auve, Glenn A. (Department: 2189)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus expansion or extension

C710S002000, C710S071000

Reexamination Certificate

active

06662254

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the field of communication devices. More specifically, the present invention is related to high capacity computer-based telecommunication devices.
BACKGROUND OF THE INVENTION
As computer telephony becomes an integral part of the existing communications network, including the Internet, there are increasing challenges in making diverse communication products work together. One of the elements in the development of computer-based communications has been the incorporation of auxiliary telecom busses to existing computer systems. These busses are incorporated into high capacity computer-based telecommunications equipment and typically transport N×64 Kbps low-latency communications traffic between the cards of the system, independently from the computer's I/O and memory busses. One such bus is defined by the Enterprise Computer Telephony Forum and is designated as H.110. H.110 is a TDM based bus providing up to 4096 time slots at 8 MHz for voice and/or data communications. This bus has been targeted to CompactPCI (cPCI) form factor products. The incorporation of this bus into the computer systems meeting the cPCI specification has been met with some problems in the art as will be discussed below.
CompactPCI is a standard laid forth by the PCI Industrial Manufacturers Group (PICMG) which specifies an electrical superset of desktop PCI utilizing a form factor suitable for rugged applications (e.g. industrial computers). The form factor of cPCI is based upon the Eurocard form factor popularized by the VME bus. CompactPCI utilizes 2 mm metric pin and socket connectors with cPCI cards inserted from the front of the chassis with I/O breakout either to the front or rear.
The form factor for cPCI cards is illustrated in FIG.
1
. CompactPCI standard supports both
3
U
100
(100 mm by 160 mm) and
6
U
102
(233.35 mm by 160 mm) card sizes. The rear card connectors are designated J
1
-J
5
(or P
1
-P
5
)
104
-
112
, in the PICMG specification, starting from the bottom of the card.
3
U
100
cPCI cards utilize both J
1
104
and J
2
106
providing 220 pins for power, ground and all 32 bit and 64 bit PCI signals. The J
1
104
(or P
1
) is 110 pins and the J
2
106
(or P
2
) is 110 pins. The card connectors are female connectors and the backplane connectors are male connectors. The
3
U form factor is the minimum for cPCI supporting 64 bit transfers, however, cards which are to only perform 32 bit transfers can utilize only the lower connector J
1
104
.
6
U
102
extensions are defined for cards where extra card area or connection space is needed. The use of the remaining connectors J
3
108
, J
4
110
, and J
5
112
are designated in the specification as capable of being user designed for specific applications.
A cPCI system is composed of one or more cPCI bus segments. Each segment comprises up to eight (eight being the limitation due to electrical load considerations) card locations at 33 MHz. A typical cPCI backplane utilizing a single cPCI segment
200
is illustrated in FIG.
2
. The cPCI backplane comprises the male J
1
202
and J
2
204
(only numbered for slot
8
206
for clarity) connectors for each of the card locations/slots
206
-
220
. Each cPCI segment comprises a system slot
220
and up to seven peripheral slots
206
-
218
. The system slot card (system card) provides arbitration, clock distribution and reset functions for the other cards on the segment. The system slot card is also manages each local card's IDSEL signal in order to perform system initialization.
At times, a cPCI system needs to utilize more than eight slots. The PICMG defines a means for cPCI system cards to drive two independent PCI bus segments in a
6
U environment. This is illustrated in FIG.
3
. System card
300
is constructed to the
6
U form factor with the first PCI segment/bus connected to connectors J
1
302
and J
2
304
. The second PCI segment/bus is connected to the card via connectors J
4
306
and J
5
308
. The first bus is referred to the PCI bus A or PCI bus B while the second bus is designated as the PCI bus C. System card
300
utilizes PCI bridge chips
310
,
312
and an on card PCI bus to bridge between the first segment and the second segment.
Purportedly, one of the advantages to implementing a system utilizing a
6
U form factor is to support extra features for an industrial system. For instance the industrial computer system is designed for computer telephony applications. In these instances, a provision must be made for a telecom bus for the transport and switching of telecom data streams between the cards in the chassis. Two important specifications related to the implementation of a telecom bus in a cPCI chassis are the PICMG 2.5 Computer Telephony specification and the ECTF H.110 (CT) bus specifications. The specifications make use of the J
4
connector and, therefore, the J
4
connector is a precious connector for telecommunication equipment manufacturers. The PICMG architecture for bridging between two PCI segments creates a wasteful use of the J
4
/J
5
connectors and further prevents the addition of a second telecom bus such as the H.110.
There is an additional need for a high capacity computer-based telecommunications device which can support a number of communication protocols. The system architecture of the present invention allows for the creation of a high capacity computer-based device which can handle a number of communication protocols. As previously noted, the Internet, or IP based networks in general, have become an important part of the current communications infrastructure. In a further embodiment, the present invention's unique architecture is utilized to provide a device which combines traditional IP routing capabilities with a gateway for non-IP traffic to the IP network. When the high capacity computer-based telecommunications device based upon the system architecture is used as a gateway, there are difficulties associated with the routing of the data, as will be described below.
The IP routing means that the device can receive IP datagrams from one IP network and forward it to the correct destination, according to the destination IP address within the datagram. When working as a gateway, a voice gateway for example, the device uses its own IP address to represent the non-IP voice channels on the IP network. To separate the incoming IP datagrams to their specific voice channel, there's a need to identify each voice flow. Since all those flows use the device IP as destination address, there's a need to look at higher layer parameters to identify a flow. Voice streams, for example, use TCP and RTP as transport layers. Each voice flow is identified by a unique <source IP, source UDP port, destination IP, destination UDP port>combination.
The handling of IP routing involves mapping of the 32 bits of the IP address to a correct destination (traditional routing operation). Since there are 2
32
different IP address, it's not practical to use a lookup table that stores the destination information, where the IP address is the entry index to this lookup table. In order to solve this mapping problem, there's a need to employ more sophisticated hashing and caching algorithms. The problem is further complicated when dealing with locally designated IP data flows (flows whose destination IP address is the local IP address of the device). These are used when the device is working as a gateway from IP to non-IP traffic.
Traditional IP routing typically involves routing only at layer
3
(by mapping the IP address as described above). A traditional router does not look at the layer
4
and above protocols to determine a destination. Datagrams are simply encapsulated in a MAC frame and forwarded to the destination device. It is the responsibility of the layer
4
and above protocols at the destination device to properly identify the unique flow (typically based upon the IP destination and source address and the TCP/UDP source and destination address). This requires a

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