Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-04-17
2007-04-17
Kim, Hong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S154000, C712S207000, C712S237000
Reexamination Certificate
active
10921026
ABSTRACT:
A system, apparatus, and method are disclosed for predicting accesses to memory. In one embodiment, an exemplary apparatus comprises a processor configured to execute program instructions and process program data, a memory including the program instructions and the program data, and a memory processor. The memory processor can include a speculator configured to receive an address containing the program instructions or the program data. Such a speculator can comprise a sequential predictor for generating a configurable number of sequential addresses. The speculator can also include a nonsequential predictor configured to associate a subset of addresses to the address and to predict a group of addresses based on at least one address of the subset, wherein at least one address of the subset is unpatternable to the address.
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Danilak Radoslav
Hakura Ziyad S.
Langendorf Brian Keith
Pescador Stefano A.
Simeral Brad W.
Cooley Godward Kronish LLP
Kim Hong
NVIDIA Corporation
Tsui Daniel
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