Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1999-12-02
2003-04-08
Beausoliel, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S716000, C714S717000, C370S217000, C370S223000
Reexamination Certificate
active
06546498
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a system using a fiber channel-arbitrated loop (hereinafter referred to as “FC-AL”) and in particular to a process for detecting/eliminating a faulty port in the FC-AL.
BACKGROUND OF THE INVENTION
Processing for detecting/eliminating a faulty port in prior art FC-AL will be described with reference to FIG.
2
.
Each port carries out recovery processing by reinitializing a loop if a fault occurs in a port, which gives an adverse affect upon the loop in a system using the FC-AL.
If the fault occurs in a port
17
, which gives an affect upon the loop
7
in
FIG. 2
, a port
27
which detects the fault on the loop
7
will transmit an LIP (Loop Initialization Protocol, a signal of loop initialization protocol) to inform other ports of the fault. A port which has received the LIP will forward the received LIP to a next other port. This causes a fiber channel protocol controller of each port to detect the occurrence of the fault for conducting only reinitialization of the loop
7
. Japanese Patent Kokai Publication No. JP-A-10-161238 describes that each port records a fault log and conducts early detection/elimination of a port which causes a fault by analyzing the log.
SUMMARY OF THE DISCLOSURE
However, it has turned out in course of investigations toward the present invention that prior art processing for detection/elimination of a faulty port has problems as follows:
A first problem resides in that it takes an extended period of time to locate a faulty port since the detection/elimination of the faulty port involves in the following sequence: recording a log, analyzing the log, assuming a faulty port and manually eliminating the faulty port. This is due to the fact that location of the faulty log is based upon assumption by log analysis.
A second problem resides in that it is impossible to achieve early recovery of a system since elimination of the faulty port requires a human intervention. Thus there is much to be desired in the prior art in the processing for detection/elimination of the faulty port.
It is therefore an object of the present invention to provide a system and process for detecting/eliminating a faulty port in a fiber channel-arbitrated loop, which achieves early location/elimination of the port which causes a fault in the loop in a FC-AL, without any human intervention.
According to a first aspect of the present invention, there is provided a system for detecting/eliminating a faulty port in a fiber channel-arbitrated loop, which comprises a plurality of nodes, a first loop comprising the plurality of nodes, a first port of each of the nodes for connecting each node with the first loop, first hub which is a connecting device for implementing loop connections, a second loop comprising the plurality of nodes, a second port connecting each node with said second loop, a second hub which is a connecting device for implementing loop connections, and means for controlling bypass/enable operation for the port of the loop in which a fault occurs in response to an instruction from a host of the other port of the doubled ports. Namely, the first and second ports constitute a double ports structure.
The port which has detected the loop fault may comprise:
means for checking whether or not a port which has detected a loop fault is a bypass/enable instruction issuing port for which its own port has a bypass-enable instruction right;
means for issuing an instruction to bypass all ports other than the own port from a normal port if the own port is the instruction issuing port;
means for bypassing the nodes which have received the bypass instruction by terminating transmission of light through ports connected with the faulty loop, and for making up the faulty loop of only a hub and the own port when the bypassing is completed;
means for registering the own port as a faulty port if the fault continues due to the hub and the own port even after the faulty loop has been made up of only the hub and own port;
means for bypassing the own port to make up the faulty loop of only the hub, and for assigning the bypass/enable instruction right to the other port from the normal loop and simultaneously transferring the registration information of the faulty port; and
means for registering all ports as faulty port if the hub is faulty when the port to which the bypass/enable instruction right has been assigned executes the same processing on any unchecked node and for closing the faulty loop.
The present system may comprise:
means for determining that the own port normally works if no fault is detected when the faulty loop is made up of only a hub and its own port;
means for issuing an enable instruction to a desired node destined to a port on the faulty loop from a normal loop;
means for registering the port which has issued an enable instruction as a faulty port by determining that there is a fault in the port which has issued the enable instruction if a faulty loop is detected and for recovering the faulty loop to a normal condition again by issuing a bypass instruction from the normal loop; and
means for terminating a processing when checking of all the ports is completed by performing the same processing for unchecked port if checking of all ports is not completed under proviso that the number of faulty ports be not limited to one.
In a second aspect of the present invention, there is provided a process for detecting/eliminating a faulty port in a fiber channel-arbitrated loop of the present invention. The process may comprise the step of controlling the bypass/enable operation for the port or ports on a loop in which a fault occurs, in response to an instruction from a host of the other port of the doubled ports.
A process for detecting/eliminating a faulty port in the detecting/eliminating system in a fiber channel-arbitrated loop may comprise the steps of:
checking, by a port which has detected a loop fault, whether or not its own port is a bypass/enable instruction issuing port having a bypass-enable instruction right;
issuing an instruction to bypass all ports other than the own port from a normal port, using a normal loop, if the own port is the instruction issuing port;
bypassing the nodes which have received the bypass instruction by terminating transmission of light through ports connected with the faulty loop, and for making up the faulty loop of only a hub sand the own port when the bypassing is completed;
registering the own port as a faulty port if the fault continues due to the hub and the own port even after the faulty loop has been made up of only the hub and own port;
by passing the own port to make up the faulty loop of only the hub, and assigning the bypass/enable instruction right to the other port from the normal loop and for simultaneously transferring the registration information of the faulty port; and
registering all ports as faulty port if the hub is faulty when the port to which the bypass/enable instruction right has been assigned executes the same processing on any unchecked node and for closing the faulty loop.
A process for detecting/eliminating a faulty port in the detecting/ eliminating system in a fiber channel-arbitrated may comprise the steps of:
determining that said own port normally works if no fault is detected when said faulty loop is made up of only a hub and its own port;
issuing an enable instruction to a desired nor destined to a port on said faulty loop from a normal loop;
registering said port which has issued an enable instruction as a faulty port by determining that there is a fault in the port which has issued the enable instruction if a faulty loop is detected and for recovering said faulty loop to a normal condition again by issuing a bypass instruction from said normal loop; and
terminating a processing when checking of all said ports is completed by performing said same processing for unchecked port if checking of all ports is not completed under proviso that the number of faulty ports be not limited to one.
A process and system for detecting/eliminating a faulty port in accorda
Beausoliel Robert
Foley & Lardner
Maskulinski Michael
NEC Corporation
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