System and method utilizing a virtual addressing buffer circuit

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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711203, 39518304, 395406, 395500, 395527, 395565, 395733, 395735, 395868, 395869, G06F 1210, G06F 9455

Patent

active

058095594

ABSTRACT:
A method and apparatus using a virtual addressing buffer circuit afford address mapping and control flexibility to provide a unique opportunity for device emulation and software debugging. The method permits the emulation of a device which is physically not present in a CPU controlled system utilizing a virtual addressing buffer circuit. The method includes the step of storing a match address which corresponds to an address location of the device. The virtual addressing buffer intercepts an address request from a CPU for the address location of the device. Bits of the requested address which are not relevant to a determination of whether the requested address matches the match address are filtered out to produce a filtered request address. The filtered request address is compared with the match address, and a match indicator is activated when the filtered requested address matches the match address. A terminate command is provided to a bus controller connected to the CPU and a local memory when the match indicator is active. An interrupt sent to the CPU from the bus controller in response to the terminate command interrupts the CPU. An interrupt routine triggered by the CPU interruption copies emulated data stored in local memory to a memory status buffer. Upon completion of the interrupt routine, a second virtual addressing buffer circuit copies the emulated data stored in the local memory status buffer to the CPU so that it appears that the emulated device responded.

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