System and method to reduce noise in a substrate

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S355000

Reexamination Certificate

active

06870228

ABSTRACT:
A system and method for reducing noise in a substrate of a chip is provided. The system may include a substrate (70) doped with a first dopant. A first well (80) may be disposed on the substrate and doped with a second dopant. A second well (120) may be disposed within the first well (80) and doped with the second kind of dopant. A first transistor (100) may include one or more first transistor components disposed in the second well (120). The first transistor (100) may be adapted to employ a first type of channel having a quiet voltage source (140) connected to a body thereof. A third well (110) may be disposed within the first well (80) and doped with the first kind of dopant. A second transistor (90) may include one or more second transistor components that may be disposed in the third well (110). The second transistor (90) may be adapted to employ a second type of channel. The first well (80) may shield the substrate (70) from noise in the second well (120) and third well (110).

REFERENCES:
patent: 5581103 (1996-12-01), Mizukami
patent: 6180998 (2001-01-01), Crafts
patent: 6403992 (2002-06-01), Wei

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