System and method to handle page validation with...

Details System and method to handle page validation with... System and method to handle page validation with...

2005-12-06

2005-12-06

Ellis, Kevin L. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C712S228000, C712S218000, C714S011000

Reexamination Certificate

active

06973552

ABSTRACT:
A system and method to detect when a page access exception occurs on a subsequent part of a long operand processed out of order before the page is asynchronously marked valid by the operating system where the first request of the operand when later processed out of order after a subsequent buffer found no exception. In this case the instruction that encountered this situation is aborted and is re-executed with no page access exceptions. This prevents reporting improper delayed access exceptions on the operand data.

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patent: 5185871 (1993-02-01), Frey et al.
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patent: 5511175 (1996-04-01), Favor et al.
patent: 5913923 (1999-06-01), Dunlap et al.
patent: 6269426 (2001-07-01), Hetherington et al.

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