Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2000-12-22
2004-03-02
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S758000, C714S776000, C714S781000
Reexamination Certificate
active
06701478
ABSTRACT:
BACKGROUND
(1) Field
This invention relates to a system and method to generate a CRC (Cyclic Redundancy Check) value using a plurality of CRC generators operating in parallel.
(2) General Background
The detection and correction of errors during the transmission of data is crucial to ensuring the reliability and integrity of data. A number of techniques of detecting the corruption of data during transmission are widely employed. At one end of the scale, a simple parity-checking method may be employed. Where more sophisticated detection and correction capabilities are required, checksum or Cyclic Redundancy Check methods are used.
A Cyclic Redundancy Check (CRC) is a technique for preserving the integrity of a frame (or packet) that is being propagated from a data source to a data destination. Broadly, the CRC methodology requires that a CRC value be generated for a packet, and appended to the packet prior to propagation from the data source. The CRC is propagated, together with the associated packet, from the data source to the data destination, and the CRC can then be utilized at the data destination to detect any corruption of the packet that may have occurred during transmission of the packet.
The CRC is generated so that the resulting packet is exactly divisible by the predetermined CRC polynomial. Accordingly, the CRC creation process at the data source involves receiving the original packet and shifting it a certain number of bits to the left. The shifted original packet is then divided by the predetermined CRC polynomial. The remainder of this division process is then examined and, if it is not zero, the resulting packet has probably experience corruption during transmission. The Cyclic Redundancy Check (CRC) technique is advantageous in that it provides good error detection capabilities, and requires relatively little overhead.
SUMMARY OF THE INVENTION
The present invention relates to a system and method to generate a CRC (Cyclic Redundancy Check) value using a plurality of CRC generators operating in parallel.
The system includes a switching module operatively coupled to a parallel data bus. The switching module generates and places a packet cycle on the parallel data bus to transmit a data packet and packet modification commands to modify the data packet.
The system further includes a bridging module operatively coupled to the parallel data bus. The bridging module modifies the data packet in accordance to the packet modification commands, and generates a Cyclic Redundancy Check (CRC) value to reflect modifications made to the data packet. The bridging module utilizes a plurality of CRC generators operating in parallel to generate the CRC value quickly and efficiently. As a result, the bridging module is able to keep up the speed of the parallel data bus.
Other aspects and features of the present invention will be come apparent to those ordinarily skilled in the art upon review of the following description of specific embodiments of the invention in conjunction with the accompanying claims and figures.
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patent: 6560742 (2003-05-01), Dubey et al.
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Moore Paul B.
Yang Changyong
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