System and method to control microprocessor startup to reduce po

Details System and method to control microprocessor startup to reduce po System and method to control microprocessor startup to reduce po

1997-11-11

1999-10-12

Butler, Dennis M.

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

Multiple or variable intervals or frequencies

713601, G06F 108

Patent

active

059648813

ABSTRACT:
A system for controlling a clock rate of a microprocessor which includes a core clock operatively coupled to the processor, the core clock providing the microprocessor with a core clock signal for clocking the processor. A power supply operatively coupled to the microprocessor provides power to the processor. An intelligent clock generating system provides the core clock with at least one clock signal of a plurality of clock signals to be used as the core clock signal, wherein the plurality of clock signals includes a master clock signal and at least one ramped clock signal.

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