System and method to bypass execution of instructions...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

Reexamination Certificate

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Details

C712S218000, C712S219000, C712S239000

Reexamination Certificate

active

07114059

ABSTRACT:
System and method to reduce execution of instructions involving unreliable data in a speculative processor. A method comprises identifying scratch values generated during speculative execution of a processor, and setting at least one tag associated with at least one data area of the processor to indicate that the data area holds a scratch value. Such data areas include registers, predicates, flags, and the like. Instructions may also be similarly tagged. The method may be executed by an execution engine in a computer processor.

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IEEE Micro, “Introducing The IA-64 Architecture”, J. Huck, et al., vol. 20, No. 5, Sep. 2000, pp. 12-23.
Computer Architecture News, “Unconstrained Sepculative Execution with Predicated State Buffering”, H. Ando, et al, vol. 23, No. 2, May 1, 1995, pp. 126-137.

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