System and method of pin programming and configuration

Details System and method of pin programming and configuration System and method of pin programming and configuration

1997-12-30

2000-10-24

Etienne, Ario

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral configuration

710 11, 710 12, 710 62, 326 37, G06F 300

Patent

active

061381772

ABSTRACT:
A system in accordance with the invention provides a chipset for use generally in a PC-type system and that includes a plurality of programmable I/O (PIO) pins. Each of the PIO pins can be programmed to carry signals in accordance with any function in a function pool. In one embodiment, the number of PIO pins total 32 and the number of functions total 70. Such programmability allows a single-chip chipset to be vendor platform-generic while simultaneously minimizing pin count.

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patent: 5511182 (1996-04-01), Le et al.
patent: 5615344 (1997-03-01), Corder
patent: 5617040 (1997-04-01), Matthews
patent: 5717695 (1998-02-01), Manela et al.
patent: 5732207 (1998-03-01), Allen et al.
patent: 5878279 (1999-03-01), Athenes

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