System and method of pattern recognition and metrology...

Details System and method of pattern recognition and metrology... System and method of pattern recognition and metrology...

2006-02-21

2006-02-21

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

Amorphous semiconductor

C438S975000, C356S150000

Reexamination Certificate

active

07001830

ABSTRACT:
The present invention relates to inspection methods and systems utilized to provide a best means for inspection of a wafer. The methods and systems include wafer-to-reticle alignment, layer-to-layer alignment and wafer surface feature inspection. The wafer-to-reticle alignment is improved by the addition of diagonal lines to existing alignment marks to decrease the intersection size and corresponding area that a desired point can reside. Layer-to-layer alignment is improved in a similar manner by the addition of oblique and/or non-linear line segments to existing overlay targets. Also, providing for wafer surface inspection in a multitude of desired diagonal axes allows for more accurate feature measurement.

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