System and method of interleaving transmitted data

Details System and method of interleaving transmitted data System and method of interleaving transmitted data

2005-05-13

2008-10-28

Tu, Christine T (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Data formatting to improve error detection correction...

C714S701000, C714S726000

Reexamination Certificate

active

07444556

ABSTRACT:
A method (500) is provided for operating an interleaver circuit120having N shift lines (2201-220N). Each shift line has a line input node, a line output node, and one or more bit storage elements (240). The method includes: storing don't-care bits in each bit storage element (520); isolating the line output nodes from an interleaver output node (520); receiving a stream of data bits at an interleaver input node (530); and sequentially connecting the interleaver input node to respective line input nodes to shift the stream of data bits into the bit storage elements of corresponding shift lines in an interleaved fashion (530). A don't-care bit is shifted out of each of the bit storage elements in corresponding shift lines as each data bit is shifted in. A last don't-care bit is shifted out of respective bit storage elements in the shift lines during N consecutively-received data bits.

REFERENCES:
patent: 5021987 (1991-06-01), Chan et al.
patent: 6282149 (2001-08-01), Pittau
patent: 6614864 (2003-09-01), Raphaeli et al.

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