Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2001-10-25
2004-05-04
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S692000, C438S438000, C438S693000, C438S697000, C438S699000
Reexamination Certificate
active
06730603
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention is directed, in general, to polishing of semiconductor wafers and, more specifically, to a system and method of determining a polishing endpoint by monitoring signal intensity during a polishing process.
BACKGROUND OF THE INVENTION
In the fabrication of semiconductor components, metal conductor lines are formed over a substrate containing device circuitry. The metal conductor lines serve to interconnect discrete devices, and thus form integrated circuits (ICs). The metal conductor lines are further insulated from the next interconnection level by thin films of insulating material deposited by, for example, Chemical Vapor Deposition (CVD) of oxide or application of Spin On Glass (SOG) layers followed by fellow processes. Holes, or vias, formed through the insulating layers provide electrical connectivity between successive conductive interconnection layers. In such wiring processes, it is desirable that the insulating layers have a smooth surface topography, since it is difficult to lithographically image and pattern layers applied to rough surfaces.
Also, deep (greater than 3 &mgr;m) and narrow (less than 2 &mgr;m) trench structures have been used in advanced semiconductor design for three major purposes: (1) to prevent latch-up and to isolate n-channel from p-channel devices in CMOS circuits; (2) to isolate the transistors of bipolar circuits; and (3) to serve as storage-capacitor structures in DRAMS. However, in this technology it is even more crucial to precisely determine the endpoint of differing materials to prevent unnecessary dishing out of the connector metal.
Chemical-mechanical polishing (CMP) has been developed for providing smooth insulator topographies. Briefly, the CMP processes involve holding and rotating a thin, reasonably flat semiconductor wafer against a wetted polishing surface under controlled chemical, pressure, and temperature conditions. A chemical slurry containing a polishing agent, such as alumina or silica, is used as the abrasive material. Additionally, the chemical slurry contains selected chemicals that etch or oxidize various surfaces of the wafer during processing. The combination of mechanical and chemical removal of material during polishing results in superior planarity of the polished surface.
CMP is also used to remove different layers of material from the surface of a semiconductor wafer. For example, following via formation in a dielectric material layer, a metallization layer is blanket-deposited, and then CMP is used to produce planar metal studs. When used for this purpose, it is important to remove a sufficient amount of material to provide a smooth surface, without removing an excessive amount of underlying materials. The accurate removal of material is particularly important in today's submicron technologies where the layers between device and metal levels are constantly getting thinner. To better determine endpoints between removed and remaining layers of a semiconductor wafer, an accurate polishing endpoint detection technique is invaluable.
In the past, endpoints have been detected by interrupting the CMP process, removing the wafer from the polishing apparatus, and physically examining the wafer surface by techniques that ascertain film thickness and/or surface topography. However, with such prior art processes if the wafer did not meet specifications, it was loaded back into the polishing apparatus for further polishing to achieve the desired planarity. This would have to be repeated until a sufficient amount of material was removed. Unfortunately, in addition to the excess time required by this technique, if too much material was removed, the wafer was likely found to be substandard to the required specifications, and often discarded altogether. By experience, an elapsed CMP time for a given CMP process has been developed with some accuracy. However, like the prior art technique just mentioned, this endpoint detection technique is time consuming, unreliable, and costly.
Various active processes have been developed to circumvent the problems associated with prior art endpoint detection techniques. However, these active processes suffer from their own disadvantages and inaccuracies. One of the better known of these prior art techniques involves the continuous monitoring of the motor current of the CMP apparatus. Specifically, the drive motor used to rotate the platen holding the polishing pad is continuously monitored during the polishing process for changes in load current. As each layer of a semiconductor wafer is polished, a certain amount of friction develops between the polishing pad and differing wafer layers. When the CMP process finishes the removal of one layer of the wafer and begins on the next, a change in the amount of friction between the polishing pad and wafer layer affects the amount of work required by the drive motor. As the work required by the drive motor changes with each different layer, the load current of the motor changes as well. These changes in load current may be monitored to determine when the polishing process has begun on a new wafer layer.
Unfortunately, this technique is typically successful for detecting the endpoint of only metal layers, and has proven inaccurate for use with dielectric and other non-metal layers. Other factors, including the various slurries that may be used depending on the desired result, may affect the current of the drive motor, leading to inaccurate results. Also, changes in load current caused by a power surge may incorrectly inform the operator that an endpoint of a particular layer of the wafer has been reached.
Another common technique found in the prior art is optical endpoint detection. In this technique, a laser, mounted in the platen, is transmitted through a window in the polishing pad and contacts the layer on the wafer currently being polished. A change in layer material may be detected by the laser to determine an endpoint of a particular layer. However, this technique may also be deficient in that problems with the window in the polishing pad can lead to inaccurate results. For instance, leakage of slurry, or even water, onto the window may distort the laser beam and detrimentally affect detection. Also, damage to the window, perhaps from a manufacturing defect or even caused by an operator mounting the polishing pad, may also prevent or alter endpoint detection. Even if the window is not affected, those skilled in the art understand the excess cost associated with such specialized polishing pads.
Still other techniques for endpoint detection found in the prior art include those techniques that bounce an acoustic signal off of the wafer layers being polished, similar to sonar principles. However, these prior art detection techniques are based on the time (or speed) of a round trip of the acoustic waves directed to, and reflected back from, the wafer layers. Unfortunately, if such techniques were employed during a polishing operation, when endpoint detection would be most beneficial, excess layer thickness may be removed while waiting to measure the time of a return trip of the waves from the layer. Such a deficiency may become even more critical when only a small thickness, for example, a few microns, needs to be polished from the wafer
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. Those skilled in the art understand that over-polishing a wafer layer by just a few microns may render dies in the wafer, or perhaps the entire wafer, unusable. With the high costs of semiconductor materials in today's competitive semiconductor market, manufacturers are understandably eager to avoid wasting product.
Thus, a more reliable and accurate technique for determining a polishing endpoint, with less risk than those found in the prior art, is desirable. Accordingly, what is needed in the art is an improved technique for accurately determining the endpoint of one semiconductor wafer layer and the beginning of the next during a polishing process that does not suffer from the deficiencies of the techniques found in the prior art.
SUMMARY OF THE I
Crevasse Annette M.
Easter William G.
Miceli Frank
Yang Yifeng Winston
Agere Systems Inc.
Tran Binh X.
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