System and method of detecting a bit processing error

Details System and method of detecting a bit processing error System and method of detecting a bit processing error

2006-07-25

2006-07-25

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error count or rate

C714S798000, C714S799000, C714S048000

Reexamination Certificate

active

07082556

ABSTRACT:
The present invention relates generally to an improvement in the ability of test systems to test bit processing capacities of electronic devices, and in particular an improvement in their ability to test the operation of an electronic device's transmitter and receiver circuitry. Data generated by a BERT is transmitted in an electrical form to a DUT and a master device. The DUT transmits data received in an electrical form to the master device in an optical form and the master device transmits data received in an electrical form to the DUT in an optical form. The master device and the DUT then transmit data received in an optical form back to the BERT in an electrical form. The data received from the DUT and the master device, respectively, is separately tested for bit errors. Do so enables to calculation of bit error rates for two distinguishable data paths through the DUT.

REFERENCES:
patent: 5268949 (1993-12-01), Watanabe et al.
patent: 5748672 (1998-05-01), Smith et al.
patent: 5761216 (1998-06-01), Sotome et al.
patent: 6661836 (2003-12-01), Dalal et al.
patent: 6694462 (2004-02-01), Reiss et al.
patent: 6859902 (2005-02-01), Dalal et al.
patent: 6874107 (2005-03-01), Lesea

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