Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2006-09-12
2006-09-12
Tsai, Henry W. H. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S211000
Reexamination Certificate
active
07107439
ABSTRACT:
When processor instructions are required for execution, a misaligned address is sent to the processor. The misaligned instruction address causes a computer processor exception. The computer system automatically executes an exception handling routine that transforms data into at least one executable instruction for the processor. In embodiments, data is transformed by decompressing a compressed instruction, decrypting an encrypted instruction, decoding a macro instruction, or transforming a non-native instruction into at least one instruction.
REFERENCES:
patent: 3543245 (1970-11-01), Nutter
patent: 3631405 (1971-12-01), Hoff et al.
patent: 3794980 (1974-02-01), Cogar et al.
patent: 3811114 (1974-05-01), Lemay et al.
patent: 3840861 (1974-10-01), Amdahl eta l.
patent: 3949372 (1976-04-01), Brioschi
patent: 3983541 (1976-09-01), Faber et al.
patent: 4068303 (1978-01-01), Morita
patent: 4077058 (1978-02-01), Appell et al.
patent: 4084235 (1978-04-01), Hirtle et al.
patent: 4110822 (1978-08-01), Porter et al.
patent: 4149244 (1979-04-01), Anderson et al.
patent: 4229790 (1980-10-01), Gilliland et al.
patent: 4274138 (1981-06-01), Shimokawa
patent: 4285040 (1981-08-01), Carlson et al.
patent: 4295193 (1981-10-01), Pomerene
patent: 4432056 (1984-02-01), Aimura
patent: 4456954 (1984-06-01), Bullions, III et al.
patent: 4463342 (1984-07-01), Langdon, Jr. et al.
patent: 4467409 (1984-08-01), Potash et al.
patent: 4488143 (1984-12-01), Martin
patent: 4507728 (1985-03-01), Sakamoto et al.
patent: 4575797 (1986-03-01), Gruner et al.
patent: 4603399 (1986-07-01), Cheek et al.
patent: 4685080 (1987-08-01), Rhodes, Jr. et al.
patent: 4724517 (1988-02-01), May
patent: 4727480 (1988-02-01), Albright et al.
patent: 4774652 (1988-09-01), Dhuey et al.
patent: 4777594 (1988-10-01), Jones et al.
patent: 4782441 (1988-11-01), Inagami et al.
patent: 4782443 (1988-11-01), Matsumoto
patent: 4799242 (1989-01-01), Vermeulen
patent: 4802119 (1989-01-01), Heene et al.
patent: 4814975 (1989-03-01), Hirosawa et al.
patent: 4835734 (1989-05-01), Kodaira et al.
patent: 4839797 (1989-06-01), Katori et al.
patent: 4868740 (1989-09-01), Kagimasa et al.
patent: 4876639 (1989-10-01), Mensch, Jr.
patent: 4992934 (1991-02-01), Portanova et al.
patent: 5031096 (1991-07-01), Jen et al.
patent: 5091846 (1992-02-01), Sachs et al.
patent: 5115500 (1992-05-01), Larsen
patent: 5132898 (1992-07-01), Sakamura et al.
patent: 5193158 (1993-03-01), Kinney et al.
patent: 5241636 (1993-08-01), Kohn
patent: 5241679 (1993-08-01), Nakagawa et al.
patent: 5255379 (1993-10-01), Melo
patent: 5280593 (1994-01-01), Bullions, III et al.
patent: 5307504 (1994-04-01), Robinson et al.
patent: 5327566 (1994-07-01), Forsyth
patent: 5335331 (1994-08-01), Murao et al.
patent: 5339422 (1994-08-01), Brender et al.
patent: 5355460 (1994-10-01), Eickemeyer et al.
patent: 5420992 (1995-05-01), Killian et al.
patent: 5430862 (1995-07-01), Smith et al.
patent: 5438668 (1995-08-01), Coon et al.
patent: 5438672 (1995-08-01), Dey
patent: 5463700 (1995-10-01), Nakazawa
patent: 5467134 (1995-11-01), Laney et al.
patent: 5481684 (1996-01-01), Richter et al.
patent: 5481693 (1996-01-01), Blomgren et al.
patent: 5506974 (1996-04-01), Church et al.
patent: 5517664 (1996-05-01), Watanabe et al.
patent: 5519873 (1996-05-01), Butter et al.
patent: 5522086 (1996-05-01), Burton et al.
patent: 5542059 (1996-07-01), Blomgren
patent: 5546552 (1996-08-01), Coon et al.
patent: 5568646 (1996-10-01), Jaggar
patent: 5574873 (1996-11-01), Davidian
patent: 5574887 (1996-11-01), Fitch
patent: 5574927 (1996-11-01), Scantlin
patent: 5574928 (1996-11-01), White et al.
patent: 5577200 (1996-11-01), Abramson et al.
patent: 5598546 (1997-01-01), Blomgren
patent: 5619665 (1997-04-01), Emma
patent: 5619666 (1997-04-01), Coon et al.
patent: 5632024 (1997-05-01), Yajima et al.
patent: 5638525 (1997-06-01), Hammond et al.
patent: 5652852 (1997-07-01), Yokota
patent: 5685009 (1997-11-01), Blomgren et al.
patent: 5732234 (1998-03-01), Vassiliadis et al.
patent: 5740461 (1998-04-01), Jaggar
patent: 5745058 (1998-04-01), Auerbach et al.
patent: 5751932 (1998-05-01), Horst et al.
patent: 5758115 (1998-05-01), Nevill
patent: 5764994 (1998-06-01), Craft
patent: 5774686 (1998-06-01), Hammond et al.
patent: 5781750 (1998-07-01), Blomgren et al.
patent: 5794010 (1998-08-01), Worrell et al.
patent: 5796973 (1998-08-01), Witt et al.
patent: 5828859 (1998-10-01), Tanihira et al.
patent: 5829012 (1998-10-01), Marlan et al.
patent: 5854913 (1998-12-01), Goetz et al.
patent: 5867681 (1999-02-01), Worrell et al.
patent: 5867682 (1999-02-01), Witt et al.
patent: 5896519 (1999-04-01), Worrell
patent: 5905893 (1999-05-01), Worrell
patent: 5948112 (1999-09-01), Shimada et al.
patent: 5954830 (1999-09-01), Ternullo, Jr.
patent: 5982459 (1999-11-01), Fandrianto et al.
patent: 6012138 (2000-01-01), Worrell
patent: 6021265 (2000-02-01), Nevill
patent: 6212630 (2001-04-01), Takayama et al.
patent: 6219774 (2001-04-01), Hammond et al.
patent: 6266765 (2001-07-01), Horst
patent: 6272620 (2001-08-01), Kawasaki et al.
patent: 6631460 (2003-10-01), Morris et al.
patent: 6651160 (2003-11-01), Hays
patent: 2001/0021970 (2001-09-01), Hotta et al.
patent: 2002/0138715 (2002-09-01), Minematsu
patent: 2002/0144041 (2002-10-01), Revilla et al.
patent: 2004/0054872 (2004-03-01), Nguyen eta l.
patent: 990394 (1976-06-01), None
patent: 0 073 424 (1983-03-01), None
patent: 0 109 567 (1984-05-01), None
patent: 0 169 565 (1986-01-01), None
patent: 0 199 173 (1986-10-01), None
patent: 0 199 173 (1986-10-01), None
patent: 0 264 215 (1988-04-01), None
patent: 0 272 198 (1988-06-01), None
patent: 0 272 198 (1988-06-01), None
patent: 0 324 308 (1989-07-01), None
patent: 0 324 308 (1989-07-01), None
patent: 0 239 081 (1995-09-01), None
patent: 0 449 661 (1995-11-01), None
patent: 0 368 332 (1997-09-01), None
patent: 2 016 755 (1979-09-01), None
patent: 2 284 492 (1995-06-01), None
patent: 2 289 353 (1995-11-01), None
patent: 2 290 395 (1995-12-01), None
patent: 95/30187 (1995-11-01), None
patent: 95/30188 (1995-11-01), None
patent: 96/24895 (1996-08-01), None
Bandyopadhyay, A. and Zheng, Y.F., “Combining Both Micro-Code And Hardwired Control In RISC,” 5 pages, (published in ACM SIGARCH Computer Architecture News, vol. 15, Issue 4, pp. 11-15 (Sep. 1987)).
Bursky, D., “Software-Efficient RISC Core Trims System-Memory Needs,” Reprinted from Electronic Design, Penton Publishing, Inc., 3 pages (Mar. 20, 1995).
Hayashi, T. et al., “A 5.6-MIPS Call-Handling Processor for Switching Systems,” IEEE Journal of Solid-State Circuits, vol. 24, No. 4, IEEE, pp. 945-950 (Aug. 1989).
“High Performance Dual Architecture Processor,” IBM Technical Disclosure Bulletin, vol. 36, No. 2, IBM Corp., pp. 231-234 (Feb. 1993).
Intel486TM Microprocessor Family Programmer's Reference Manual, Intel Corporation, 1992, pp. 23-25, 23-26, and 23-29.
McNeley, K.J. and Milutinovic, V.M., “Emulating a Complex Instruction Set Computer with a Reduced Instruction Set Computer,” IEEE Micro, IEEE, pp. 60-72 (Feb. 1987).
“LSI Tiny Risc development,” http://www.redhat.com/support/manuals/gnupro99r1/6_embed/emb09.html, 13 pages (Apr. 2001).
VR4121™ 64/32-Bit MicroprocessorμPD30121, NEC Corporation 1998, Document No. U13569EJ4V1UM00 (4thedition), pp. 1-19 and 103-131, Published Jul. 2000.
MIPS Technologies Licenses MIPS64™ 5Kf™ and MIPS32™ 4KEc™ Processor Cores to LSI Logic, from http://www.mips.com/pressReleases/061101C.html, MIPS Technologies, Inc., 3 pages (Jun. 11, 2001).
Sweetman, D.,See MIPS Run, Morgan Kaufmann Publishers, Inc., ISBN 1-55860-140-3, pp. vii-xiv, 91-101, 369-386 and 423-425 (1999).
Turley, J., “LSI's TinyRisc Core Shrinks Code Size: Code-Compaction Technique Squeezes MIPS Instructions Into 16 Bits,”Microprocessor Report, Microdesign Resources, pp. 40-43 (Oct. 28, 1996).
LSI Logic announces world's highest-performing 64-bit MIPS embedded microprocessor core: Two new MIPS-based EasyMACRO ASIC cores offer size, speed and perfor
MIPS Technologies Inc.
Tsai Henry W. H.
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