Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2011-06-28
2011-06-28
Zaman, Faisal M (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S066000, C710S307000, C326S037000, C326S038000, C326S039000
Reexamination Certificate
active
07970979
ABSTRACT:
A high performance field programmable gate array is described with one or more signal processing engines coupled to a programmable logic fabric. Each signal processing engine includes a signal processing unit for performing specifying tasks and a bus-based configurable connection box for routing a bus-based input to a bus-based output. The signal processing unit has a floating point unit (FPU)/multiply accumulate (MAC) for computation and register files for storing information. The programmable logic fabric is coupled to the one or more signal processing engines for routing of information between the signal processing engines.
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Gunwani Manoj
Sunkavalli Ravi
Verma Hare Krishna
Agate Logic, Inc.
Radlo & Su LLP
Zaman Faisal M
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