System and method of asynchronous data transfer through a plural

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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Details

370465, 370468, 370470, 370471, H04L 700, H04L 2536, H04L 2540

Patent

active

057815984

ABSTRACT:
A system and method are disclosed for asynchronously transmitting data from an originating system to a receiving system over first and second channels. The system determines an originating data rate at the originating system, sets a threshold data rate, transmits data in character mode on the first channel when the originating data rate is below the threshold data rate, and transmits data in packet mode on the first and second channels when the originating data rate is above the threshold data rate. The system continuously monitors the originating data rate while transmitting data, and dynamically switches from character mode to packet mode when the originating data rate changes from below the threshold data rate to above the threshold data rate. The system also dynamically switches from packet mode to character mode when the originating data rate changes from above the threshold data rate to below the threshold data rate. Received packets are stored in a plurality of first-in-first-out (FIFO) ring buffers, each having a sequence number matching the sequence number of the packet stored therein. Each received packet is sent from the receiving system to an attached computer when the received packet is completely received, a check sum in the received packet is valid, and there are no missing packets before the received data packet.

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