System and method for write location defect compensation in comp

Details System and method for write location defect compensation in comp System and method for write location defect compensation in comp

1998-07-01

2000-04-18

Edun, Muhammad

Dynamic information storage or retrieval

Condition indicating, monitoring, or testing

Including radiation storage or retrieval

369 48, 369 58, G11B 700

Patent

active

060523484

ABSTRACT:
A system and method for write location defect compensation in computer storage media comprises a reflectivity channel containing a detector device and counter device, an error threshold device coupled to the reflectivity channel for determining if the write location defect requires compensation, and memory devices coupled to a processor for storage of the defective write locations. A processor responsively reallocates write data to a different write location and thus maintains an efficient and reliable data storage system.

REFERENCES:
patent: 5237553 (1993-08-01), Fukushima et al.
patent: 5245491 (1993-09-01), Horie et al.
patent: 5270991 (1993-12-01), Verboom
patent: 5493561 (1996-02-01), Nishiuchi et al.
patent: 5748590 (1998-05-01), Iwasaki et al.

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