System and method for verifying trace lengths and trace...

Details System and method for verifying trace lengths and trace... System and method for verifying trace lengths and trace...

2008-04-29

2008-04-29

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

Reexamination Certificate

active

07367003

ABSTRACT:
The present invention provides a method for verifying trace lengths and trace spaces in a circuit. The method includes the steps of: retrieving information of a trace layout of the circuit; retrieving preset design rules on the trace lengths and the trace spaces of the trace layout; computing trace lengths and trace spaces of traces in the trace layout; verifying trace lengths and trace spaces in the trace layout by comparing the computed trace lengths and trace spaces of the traces with the preset design rules; and reporting results of the verifying step. A related system is also provided.

REFERENCES:
patent: 6581196 (2003-06-01), Eisenberg et al.
patent: 6865724 (2005-03-01), Eisenberg et al.

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