System and method for verifying trace distances of a PCB layout

Details System and method for verifying trace distances of a PCB layout System and method for verifying trace distances of a PCB layout

2007-01-23

2007-01-23

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10977982

ABSTRACT:
A system for verifying trace distances of a PCB layout includes a computer (10) and a database (11). The computer includes: a segment receiving module (100) for receiving segments of a selected trace, and depositing the segments in a segment set; a segment selecting module (101) for selecting an unverified segment from the segment set; a distance setting module (102) for setting a searching distance; an area ascertaining module (103) for ascertaining a rectangular area; a segment searching module (104) for searching segments of other traces in the rectangular area; a distance calculating module (105) for calculating a distance between the unverified segment and each searched segment; a distance comparing module (106) for comparing the calculated distances to obtain a shortest distance, and comparing the shortest distance with a preset benchmark distance; and a verification determining module (107) for determining whether all segments of the selected trace has been verified.

REFERENCES:
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patent: 6316944 (2001-11-01), Barnette et al.
patent: 6718529 (2004-04-01), Iwanishi
patent: 6799306 (2004-09-01), Araki et al.
patent: 7117459 (2006-10-01), Tanimoto et al.

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