System and method for utilizing first-in-first-out (FIFO)...

Details System and method for utilizing first-in-first-out (FIFO)... System and method for utilizing first-in-first-out (FIFO)...

2011-07-19

2011-07-19

Peyton, Tammara (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

C710S052000, C710S054000, C710S055000, C710S056000

Reexamination Certificate

active

07984212

ABSTRACT:
A system and method for sharing peripheral first-in-first-out (FIFO) resources is disclosed. In one embodiment, a system for utilizing peripheral FIFO resources includes a processor, a first peripheral FIFO controller and a second peripheral FIFO controller coupled to the processor for controlling buffering of first data and second data associated with the processor respectively. Further, the system includes a merge module coupled to the first peripheral FIFO controller and the second peripheral FIFO controller for merging a first FIFO channel associated with the first peripheral FIFO controller and a second FIFO channel associated with the second peripheral FIFO controller based on an operational state of the first FIFO channel and an operational state of the second FIFO channel respectively. Also, the system includes a first FIFO and a second FIFO coupled to the merge module via the first FIFO channel and the second FIFO channel respectively.

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