Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-11-22
2005-11-22
Thompson, A. M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06968519
ABSTRACT:
A method and system are disclosed for efficiently and effectively toggling logic states of chip elements during a burn-in process of a digital integrated circuit chip. A set of IDDQ patterns are generated by a design simulation tool, based on the design of the chip, during a simulation of the design. The set of IDDQ patterns are translated to a set of burn-in patterns that are compatible with a pattern format of a burn-in board using a pattern translation tool. The set of burn-in patterns are stored in memory on the burn-in board and shifted into the memory during the burn-in process to aid in toggling logic states of the chip elements.
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Broadcom Corporation
McAndrews Held & Malloy Ltd.
Thompson A. M.
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