System and method for updating a time-related state of a...

Details System and method for updating a time-related state of a... System and method for updating a time-related state of a...

2007-04-16

2010-12-07

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S400000

Reexamination Certificate

active

07849347

ABSTRACT:
An apparatus, program product and method for automatically and transparently determining the time required to migrate a logical partition. This determined latency may be used to update clocks and other time-related values of the migrated logical partition.

REFERENCES:
patent: 5440727 (1995-08-01), Bhide et al.
patent: 5636373 (1997-06-01), Glendening et al.
patent: 5918040 (1999-06-01), Jarvis
patent: 6044447 (2000-03-01), Averill et al.
patent: 6209106 (2001-03-01), Kubala et al.
patent: 6510496 (2003-01-01), Tarui et al.
patent: 7356725 (2008-04-01), Engler et al.
patent: 2003/0233479 (2003-12-01), Keohane et al.
patent: 2006/0037027 (2006-02-01), Carlson et al.
patent: 2006/0133426 (2006-06-01), Craddock et al.
patent: 2007/0011495 (2007-01-01), Armstrong et al.
patent: 2008/0120518 (2008-05-01), Ritz et al.
patent: 2008/0163239 (2008-07-01), Sugumar et al.
patent: 2009/0013149 (2009-01-01), Uhlig et al.

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