Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2002-07-29
2004-11-09
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S111000, C710S039000
Reexamination Certificate
active
06816954
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to the field of electronic devices, and particularly to a system and method for tuning retry performance of read requests of data from electronic data storage devices.
BACKGROUND OF THE INVENTION
The storage of data in an electronic format has been one of the driving forces of the increased efficiency and productivity of modern life. From business to personal use, people increasingly rely on electronic data storage to store ever greater amounts of data. Because of the increased amounts of data, efficiencies realized in electronic data storage may be multiplied through a wide range of areas using these data storage techniques.
One such area that may be improved is the access of electronic data. Because of the large amounts of data, significant time may be required to fetch data from a storage medium. Such delays may result in the system waiting for the data, instead of performing other desired functions for a user. The delays may be further magnified by the sheer number of data accesses required to perform even simple tasks on an information handling system. Therefore, any efficiency realized in the fetching of data may be greatly magnified by the great number of accesses required in even a typical information handling system.
Therefore, it would be desirable to provide a system and method for tuning retry performance of read requests of data from electronic data storage devices.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a system and method for tuning retry performance of read requests of data from electronic data storage devices. In an aspect of the present invention, a method for performing a delayed read in an electronic data storage system having an initiator and a target device includes initiating a delayed read by the initiator to the target device and issuing at least one delayed read. The initiator then delays for a programmed interval before reissuing the at least one delayed read.
In an additional aspect of the present invention, an electronic data storage system includes an initiator suitable for requesting data and a target device suitable for storing data electronically, the target device communicatively coupled to the initiator utilizing a bus. A delayed read is initiated by the initiator to the target device and at least one delayed read is issued. The initiator delays for a programmed interval before reissuing the at least one delayed read.
In a further aspect of the present invention, a method for performing a delayed read in an electronic data storage system having an initiator and a target device includes initiating a delayed read sequence by the initiator to the target device and issuing a sequence of delayed reads. The initiator then delays for a programmed interval before reissuing at least one delayed read of the sequence of delayed reads.
It is to be understood that both the forgoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and together with the general description, serve to explain the principles of the invention.
REFERENCES:
patent: 5884052 (1999-03-01), Chambers et al.
patent: 6081859 (2000-06-01), Munguia
patent: 6282598 (2001-08-01), Manabe
patent: 6289406 (2001-09-01), Chambers et al.
patent: 6633936 (2003-10-01), Keller et al.
Kim Matthew
LSI Logic Corporation
Suiter - West PC LLO
Thomas Shane
LandOfFree
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