Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-02-09
2008-07-15
Sough, Hyung (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S131000, C711S134000
Reexamination Certificate
active
07401186
ABSTRACT:
Method, system and computer program product for tracking changes in an L1 data cache directory. A method for tracking changes in an L1 data cache directory determines if data to be written to the L1 data cache is to be written to an address to be changed from an old address to a new address. If it is determined that the data to be written is to be written to an address to be changed, a determination is made if the data to be written is associated with the old address or the new address. If it is determined that the data is to be written to the new address, the data is allowed to be written to the new address following a prescribed delay after the address to be changed is changed. The method is preferably implemented in a system that provides a Store Queue (STQU) design that includes a Content Addressable Memory (CAM)-based store address tracking mechanism that includes early and late write CAM ports. The method eliminates time windows and the need for an extra copy of the L1 data cache directory.
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patent: 6081872 (2000-06-01), Matick et al.
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patent: 6519682 (2003-02-01), Richardson et al.
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Levenstein Sheldon B.
Saporito Anthony
Gerhardt Dianan R.
Glanzman Gerald H.
International Business Machines - Corporation
Patel Kaushikkumar
Sough Hyung
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