Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1996-12-05
1999-11-30
Kim, Kenneth S.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 37, 714 45, 712227, G06F 1130
Patent
active
059960922
ABSTRACT:
A system and method for tracing program code within a processor having an embedded cache memory. The non-invasive tracing technique minimizes the need for trace information to be broadcast externally. The tracing technique monitors changes in instruction flow from the normal execution stream of the code. The tracing technique monitors the updating of processor branch target register contents in order to monitor branch target flow of the code. Tracing of the program flow includes tracing instructions both before and after a trace triggering event. The implementation of periodic synchronizing events enables the tracing of instructions occurring before and after a triggering event.
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Augsburg Victor Roberts
Bridges Jeffrey Todd
Collopy Thomas K.
Dieffenderfer James N.
Sartorius Thomas Andrew
Flynn John D.
International Business Machines - Corporation
Kim Kenneth S.
Phillips Steven B.
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