Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2009-01-20
2009-12-15
Tu, Christine T (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C726S002000
Reexamination Certificate
active
07634699
ABSTRACT:
A system and method for testing a data storage device without revealing memory content. To control the individual bits of the memory during testing each value is written into the memory according to the equationin-line-formulae description="In-line Formulae" end="lead"?NEW_DATA=CURRENT_DATA XOR DATA_SEEDin-line-formulae description="In-line Formulae" end="tail"?such that individual bits of NEW_DATA are equal to CURRENT_DATA with selected bits inverted when the corresponding positions in DATA_SEED are high. NEW_DATA is written into the memory, read out and verified, so that all bit positions can be controlled and tested in both logic states, while NEW_DATA and CURRENT_DATA are not ascertainable by the testing software.
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Dimock Stratton LLP
Research In Motion Limited
Tu Christine T
Wilson Jenna L.
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