System and method for testing a data storage device without...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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C726S002000

Reexamination Certificate

active

11098496

ABSTRACT:
A system and method for testing a data storage device without revealing memory content. To control the individual bits of the memory during testing each value is written into the memory according to the equationin-line-formulae description="In-line Formulae" end="lead"?NEW_DATA=CURRENT_DATA XOR DATA_SEEDin-line-formulae description="In-line Formulae" end="tail"?such that individual bits of NEW_DATA are equal to CURRENT_DATA with selected bits inverted when the corresponding positions in DATA_SEED are high. NEW_DATA is written into the memory, read out and verified, so that all bit positions can be controlled and tested in both logic states, while NEW_DATA and CURRENT_DATA are not ascertainable by the testing software.

REFERENCES:
patent: 4864615 (1989-09-01), Bennett et al.
patent: RE36181 (1999-04-01), Koopman et al.
patent: 6324287 (2001-11-01), Angert
patent: 2005/0154953 (2005-07-01), Norskog

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