Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2003-11-07
2009-02-03
Beausoliel, Jr., Robert W (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
07487399
ABSTRACT:
A computer system comprising a processor configured to cause an operating system to be booted, a test module, and a component coupled to the test module and configured to receive a clock input is provided. The test module is configured to cause the clock input to be provided to the component at a first frequency, and the test module is configured to cause a first test to be performed on the component subsequent to the clock input being provided to the component at the first frequency and the operating system being booted.
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GB Search Report for Application No. GB0424561.9 mailed on Jan. 21, 2005 (3 pages).
Barr Andrew H.
Pomaranski Ken G.
Shidla Dale J.
Beausoliel, Jr. Robert W
Hewlett--Packard Development Company, L.P.
Mehrmanesh Elmira
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