Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2011-01-11
2011-01-11
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C706S019000, C703S002000
Reexamination Certificate
active
07870523
ABSTRACT:
The present invention provides a system and method for resolving a test generation problem involving constraint resolution problems where a verification environment includes constraints that are suitable for resolution using one type of solver for a first domain and other constraints that are suitable for resolution using a different solver in a second domain. The invention further comprises variables and, in instances where at least one variable is in each of the first and second domains, using these solvers to restrict the set of permissible values of variables to be consistent in multiple domains, preferably in all relevant domains.A constraint resolution problem is divided into clusters of constraints connected within a domain, and connected clusters of clusters that are connected through shared variables that are subject to constraints in more than one cluster.A preferred solver is applied to constraints in each of various domains such that constraints in multiple clusters and domains in a connected cluster are consistent for connected constraints in a domain, and preferably all constraints in all clusters in all domains within the connected cluster are consistent.
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Gal Amit
Kinderman Yael
Lagoon Vitaly
Noy Amos
Uziel Shlomi
Cadence Design Systems Inc.
Chiang Jack
Rosenberg , Klein & Lee
Sandoval Patrick
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