System and method for synchronizing translation lookaside...

Details System and method for synchronizing translation lookaside... System and method for synchronizing translation lookaside...

2005-08-25

2009-11-10

Peugh, Brian R (Department: 2187)

Electrical computers and digital processing systems: memory

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Address mapping

C711S203000, C711S205000, C711S206000

Reexamination Certificate

active

07617380

ABSTRACT:
A system and method for synchronizing translation lookaside buffer (TLB) access in a multithread processor is disclosed. When a first exception is found while searching the TLB, the exception is handled. While the exception is handled, thread processors are restricted from requesting the handling of any other exception.

REFERENCES:
patent: 5918251 (1999-06-01), Yamada et al.
patent: 6049867 (2000-04-01), Eickemeyer et al.
patent: 6523104 (2003-02-01), Kissell
patent: 6697935 (2004-02-01), Borkenhagen et al.
patent: 2002/0144077 (2002-10-01), Andersson et al.

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