Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2004-11-12
2008-08-05
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C326S022000, C326S026000, C326S030000, C326S031000, C326S101000
Reexamination Certificate
active
07409659
ABSTRACT:
A static latch circuit is used to suppress crosstalk glitch in a synchronous digital integrated circuit. A static latch is inserted into a selected victim net, and the net is examined if crosstalk glitch induced in the selected victim net is sufficiently suppressed. If not, then the selected victim net is examined to check whether the crosstalk glitch is primarily due to propagated noise from an earlier stage or due to noise injected in the selected victim net. If the crosstalk glitch is propagated from an earlier stage, then a second static latch is inserted before the state in which the first static latch is inserted. Alternatively, another static latch may be inserted in the selected victim net. Cell libraries including a variety of static latch circuit architectures can be designed.
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Chakraborty Kanad
Gabara Thaddeus J.
Stiles Kevin R.
Xu Bingxiong
Agere Systems Inc.
Kik Phallaka
Mendelsohn Steve
Mendelsohn & Associates
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