Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-07-19
2005-07-19
Rinehart, Mark H. (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S003000, C710S038000, C710S311000, C711S202000
Reexamination Certificate
active
06920519
ABSTRACT:
Dynamic routing of data to multiple processor complexes. PCI address space is subdivided among a plurality of processor complexes. Translation table entries at each processor complex determine which processor complex is to receive a DMA transfer, thereby enabling routing of DMA data to one I/O hub node while accessing translation table entries at another I/O hub node. Further, interrupt requests may be dynamically routed to multiple processor complexes.
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Beukema Bruce Leroy
Bronson Timothy Carl
Bybell Anthony J
Fuhs Ronald Edward
Gilda Glenn David
Beckstrand Shelley M
Lee Christopher E.
Rinehart Mark H.
Steinberg William H.
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