Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2005-03-09
2008-11-11
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S005000, C711S006000
Reexamination Certificate
active
07451282
ABSTRACT:
The present invention provides an improved apparatus and method for the receipt of high-speed sequential data streams. It utilizes the concept of banked memories to reduce the required speed and size of the input buffers used to receive the data streams. This allows the device to employ large, relatively slow memory elements, thereby permitting large amounts of sequential data to be stored by the receiving device. Using control information that was written as the data was being stored in the memory banks, a reordering element is later able to retrieve the data elements from the plurality of memory banks, in an order that is different from that in which the stream was received, and to reassemble the data stream into the original sequence.
REFERENCES:
patent: 5410546 (1995-04-01), Boyer et al.
patent: 6510474 (2003-01-01), Stracovsky et al.
patent: 6526484 (2003-02-01), Stacovsky et al.
patent: 7240347 (2007-07-01), Lim et al.
Dohm Nathan
Meier Karl
Bataille Pierre-Michel
Dolphin Interconnect Solutions North America Inc.
Nields & Lemack
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