System and method for sequencing multiple write state machines

Details System and method for sequencing multiple write state machines System and method for sequencing multiple write state machines

2007-07-31

2007-07-31

Perveen, Rehana (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power sequencing

Reexamination Certificate

active

10749943

ABSTRACT:
In some embodiments, systems and methods for sequencing multiple write state machines may comprise a pulse generator, a delay circuit, and a stacked memory array, wherein each memory array in the stacked memory array have an individual write state machine. In an exemplary embodiment, the pulse generator may be operable to supply pulses of current to the write state machines so that the system's voltage regulator may accommodate the total aggregated current in the system. In some exemplary embodiments, pulses of current may be applied to the first write machine, and delayed pulses of current may be applied to the second write state machine.

REFERENCES:
patent: 4878028 (1989-10-01), Wang et al.
patent: 5793694 (1998-08-01), Akiba et al.
patent: 6075741 (2000-06-01), Ma et al.
patent: 6191974 (2001-02-01), Nishida et al.
patent: 6937517 (2005-08-01), Pekny et al.

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