Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-04-08
2008-04-08
Sparks, Donald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S141000
Reexamination Certificate
active
07356652
ABSTRACT:
A manner for judiciously snooping or otherwise monitoring bus operations associated with maintaining cache or other memory coherency in a computing system. A bus snoop information storage mode is established that identifies information pertaining to the bus snoop operations used to maintain memory coherency. The bus snoop information storage mode is selectable, relative to possible other modes. When the bus snoop information storage mode is activated, the information pertaining to the bus snoop operations occurring in connection with bus snoop stall cycles is disregarded, while the current state of the information pertaining to the bus snoop operations upon completion of the bus snoop operations is stored.
REFERENCES:
patent: 6049847 (2000-04-01), Vogt et al.
patent: 6697900 (2004-02-01), Hadley
patent: 6792563 (2004-09-01), DesRosier et al.
Dew Marshall R.
Sutter Stephen
Tran Howard Huy P.
Williams David P.
Hollingsworth & Funk LLC
Johnson Charles A.
Marley Robert
Ruiz Aracelis
Sparks Donald
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