System and method for reference count regeneration

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Reexamination Certificate

active

07130983

ABSTRACT:
In a disk-based data storage system, a controller configured to control a reference count regeneration operation, the controller includes a control register, an address register, a status register, a boundary register, and an embedded memory. The control register may be configured to set up and initiate program instructions that are executed by at least one processor. The address register may be configured as a cache address pointer and correspond to at least one of a sort output list pointer, a virtual track table input list pointer, a reference list pointer, a track number table pointer, and a reference count mis-compare list pointer. The status register may be configured to indicate status of a routine. The routine includes at least one of a radix sort, a reference list count, a combine counts, and a merger of the reference list count into the TNT to generate an updated TNT. The boundary register corresponds to a disk cache memory that may be configured to store at least one of a reference list, a reference list count length, and a mis-compare list. The embedded memory may be configured to perform at least one buffer operation in connection with the routine.

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Specification, “System And Method For Reference Count Regeneration”.

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