System and method for redundancy memory decoding

Details System and method for redundancy memory decoding System and method for redundancy memory decoding

2006-04-25

2006-04-25

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S225700, C365S230060, C365S195000

Reexamination Certificate

active

07035152

ABSTRACT:
A redundancy system for disabling access to normal memory elements when memory addresses corresponding to those normal memory elements match programmed redundancy addresses before the memory addresses and the programmed redundancy addresses are compared. Access to the normal memory elements is disabled based on the programmed redundancy addresses.

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