Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-30
2008-08-26
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07418675
ABSTRACT:
A system an method of designing an integrated circuit identifies a plurality of synchronous cells of an integrated circuit to be driven by a clock driver, wherein the plurality of synchronous cells are a subset of previously placed cells of the integrated circuit. The placement of synchronous cells is performed to reduce a current needed from the clock driver to drive the plurality of synchronous cells.
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patent: 2007/0030030 (2007-02-01), Waldrop
Dalbey John M.
Jarrar Anis M.
MacDonald Colin
Chiang Jack
Freescale Semiconductor Inc.
Tat Binh C
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