System and method for reducing the power consumption of...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

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07418675

ABSTRACT:
A system an method of designing an integrated circuit identifies a plurality of synchronous cells of an integrated circuit to be driven by a clock driver, wherein the plurality of synchronous cells are a subset of previously placed cells of the integrated circuit. The placement of synchronous cells is performed to reduce a current needed from the clock driver to drive the plurality of synchronous cells.

REFERENCES:
patent: 5657239 (1997-08-01), Grodstein et al.
patent: 6204713 (2001-03-01), Adams
patent: 6473890 (2002-10-01), Yasui et al.
patent: 7095251 (2006-08-01), Wilcox et al.
patent: 2004/0150427 (2004-08-01), Wilcox
patent: 2007/0030030 (2007-02-01), Waldrop

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