System and method for reading multiple voltage level memories

Static information storage and retrieval – Systems using particular element – Capacitors

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Details

365210, 365187, 365174, 36518901, 365204, 365202, G11C 700

Patent

active

057085986

ABSTRACT:
A system and method for reading multi-bit memory cells. The invention resides in employing a plurality of comparators to compare the voltage contained in a multi-bit memory cell with a reference voltage, where each comparator is associated with a single pair of bit lines. For each pair of bit lines, a first bit line is coupled to a multi-bit memory cell and a second bit line is coupled to a dummy cell containing a reference voltage. The first bit line is also coupled to a data bus. The data bus is configured to connect the first bit line to a first input of each of a plurality of comparators that are associated with other bit lines and memory cells. Each comparator has a unique reference voltage applied to its second input. Each comparator compares the voltage on the first bit line with the applied reference voltage and outputs the result of this comparison to a controller. The controller repeatedly instructs a voltage source to alter the voltage levels applied to the second input of each comparator until the controller can determine the values of the data bits represented by the voltage stored in the multi-bit memory cell.

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