Electrical computers and digital processing systems: processing – Processing control – Context preserving (e.g. – context swapping – checkpointing,...
Reexamination Certificate
2006-10-10
2006-10-10
Fleming, Fritz (Department: 2181)
Electrical computers and digital processing systems: processing
Processing control
Context preserving (e.g., context swapping, checkpointing,...
C712S225000
Reexamination Certificate
active
07120783
ABSTRACT:
A system and method for enabling multithreading in a embedded processor, invoking zero-time context switching in a multithreading environment, scheduling multiple threads to permit numerous hard-real time and non-real time priority levels, fetching data and instructions from multiple memory blocks in a multithreading environment, and enabling a particular thread to modify the multiple states of the multiple threads in the processor core.
REFERENCES:
patent: 4110831 (1978-08-01), Langdon, Jr.
patent: 4777587 (1988-10-01), Case et al.
patent: 4821187 (1989-04-01), Ueda et al.
patent: 4825355 (1989-04-01), Kurakazu et al.
patent: 4939735 (1990-07-01), Fredericks et al.
patent: 5163146 (1992-11-01), Antanaitis, Jr. et al.
patent: 5247636 (1993-09-01), Minnick et al.
patent: 5260703 (1993-11-01), Nguyen et al.
patent: 5392435 (1995-02-01), Masui et al.
patent: 5404469 (1995-04-01), Chung et al.
patent: 5410658 (1995-04-01), Sawase et al.
patent: 5430884 (1995-07-01), Beard et al.
patent: 5515538 (1996-05-01), Kleiman
patent: 5524250 (1996-06-01), Chesson et al.
patent: 5727211 (1998-03-01), Gulsen
patent: 5761470 (1998-06-01), Yoshida
patent: 5867725 (1999-02-01), Fung et al.
patent: 5907694 (1999-05-01), Suzuki et al.
patent: 5933650 (1999-08-01), van Hook et al.
patent: 5944816 (1999-08-01), Dutton et al.
patent: 6009505 (1999-12-01), Thayer et al.
patent: 6026503 (2000-02-01), Gutgold et al.
patent: 6061710 (2000-05-01), Eickemeyer et al.
patent: 6085215 (2000-07-01), Ramakrishnan et al.
patent: 6317774 (2001-11-01), Jones et al.
patent: 6366998 (2002-04-01), Mohamed
patent: 6378018 (2002-04-01), Tsern et al.
patent: 6385713 (2002-05-01), Yung
patent: 6460116 (2002-10-01), Mahalingaiah
patent: 6493741 (2002-12-01), Emer et al.
patent: 6542991 (2003-04-01), Joy et al.
patent: 6567839 (2003-05-01), Borkenhagen et al.
patent: 6718360 (2004-04-01), Jones et al.
patent: 6728722 (2004-04-01), Shaylor
patent: 6766515 (2004-07-01), Bitar et al.
patent: 2003/0037228 (2003-02-01), Kelsey et al.
patent: 2003/0110344 (2003-06-01), Szczepanek et al.
patent: WO 99/54813 (1999-10-01), None
Nemirovsky, Dr. Mario Daniel; Brewer, Dr. Forrest; and Wood, Dr. Roger C.; DISC: Dynamic Instruction Stream Computer; 1991; ACM; pp. 163-171.
Schwan, Karsten and Zhou, Hongyi; Dynamic Scheduling Of Hard Real-Time Tasks And Real-Time Threads; IEEE Transactions On Software Engineering; vol. 18, No. 8; Aug. 1992; pp. 736-748.
Eggers, S. et al., “Simultaneous Multithreading: A Platform for Next-Generation Processors,” IEEE Micro, Oct. 1997, pp. 12-19.
Intel Corporation, Pentium Processor Family Developer's Manual, vol. 3;Architecture and Programming Manual, 1995, pp. 25-1 and 25-30.
El-Kharashi, et al., Multithreaded Processors: The Upcoming Generation for Multimedia Chips, 1998 IEEE Symposium on Advances in Digital Filtering and Signal Processing, Jun. 5-6, 1998, pp. 111-115.
Binns, P. “A Robust High-Performance Time Partitioning Algorithm: The Digital Engine Operating System (DEOS) Approach,” 2001, pp. 1.B.6-1.B.6-12.
Fotland David A.
Mimaroglu Tibet
Fenwick & West LLP
Fleming Fritz
Meonske Tonia L.
Ubicom Inc.
LandOfFree
System and method for reading and writing a thread state in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for reading and writing a thread state in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for reading and writing a thread state in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3685835