System and method for reading a memory cell

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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C365S148000, C365S189070

Reexamination Certificate

active

11252143

ABSTRACT:
A method of performing a read operation from a first magnetic random access memory (MRAM) cell in a memory cell string that includes the first MRAM cell coupled to a second MRAM cell. The method includes providing a voltage to a first end of the first memory cell string that is closest to the first MRAM cell, providing a ground source to a second end of the first memory cell string that is opposite the first end, and determining whether a voltage change occurred at a node between the first and second MRAM cells in response to applying a write sense current to the first MRAM cell.

REFERENCES:
patent: 6169686 (2001-01-01), Brug et al.
patent: 6259644 (2001-07-01), Tran et al.
patent: 6567297 (2003-05-01), Baker
patent: 6836422 (2004-12-01), Perner et al.
patent: 6885579 (2005-04-01), Sakimura et al.
patent: 6947317 (2005-09-01), Iwata
patent: 6982909 (2006-01-01), Perner et al.
patent: 2002/0101758 (2002-08-01), Baker
patent: 2003/0039162 (2003-02-01), Baker
“Nonvolatile RAM based on Magnetic Tunnel Juncntion Elements” by M Durlam et al. 2000 IEEE International Solid-State Circuits Conference 07803-5853-8/00, Motorola Labs.
“A 10ns Read and Write Non-volatile Memory Aray Using a Magnetic Tunnel Junction and FET Swetch in each Cell” by Roy Scheuerlein et al. 2000 IEEE conf 07803-5853-8/00, IBM.
“Offset Compensating Bit-Line Sensing Scheme for High Denstiy DRAM's” by Yohi Watanabe et al., IEE Journal of Solid-state Circuits, vol. 29 No. 1, Jan. 1994.

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