System and method for providing low voltage high density...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S317000, C257SE29300

Reexamination Certificate

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08004032

ABSTRACT:
A system and method is disclosed for providing a low voltage high density multi-bit storage flash memory. A dual bit memory cell of the invention comprises a substrate having a common source, a first drain and first channel, and a second drain and a second channel. A common control gate is located above the source. A first floating gate and a second floating gate are located on opposite sides of the control gate. Each floating gate is formed with a sharp tip adjacent to the control gate and an upper curved surface that follows a contour of the surface of the control gate. The sharp tips of the floating gates efficiently discharge electrons into the control gate when the memory cell is erased. The curved surfaces increase capacitor coupling between the control gate and the floating gates.

REFERENCES:
patent: 6268622 (2001-07-01), Shone et al.
patent: 6566707 (2003-05-01), Sudo et al.
patent: 7015102 (2006-03-01), Wang
patent: 7242051 (2007-07-01), Widjaja et al.
patent: 2006/0001077 (2006-01-01), Ryu et al.
David Sowards, “Non-Volatile Memory: The principles, the technologies, and their significance to the smart card integrated circuit,” 1999 Emosyn and Silicon Storage Technology, pp. 1-13.

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