System and method for providing high speed memory access in a mu

Details System and method for providing high speed memory access in a mu System and method for providing high speed memory access in a mu

1997-01-30

1999-03-02

An, Meng-Ai T.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

395309, 395287, 395729, 711148, 711150, G06F 1314

Patent

active

058782400

ABSTRACT:
A processing system comprising a plurality of processors and a plurality of memories, wherein each processor is connected to a memory by a primary bus. When one processor needs to access another processor's memory, it requests access to that particular memory. A bus control monitors memory transactions and causes the processor for this target memory to relinquish the memory. The bus controller then configures a transfer bus and forwards the memory access command to the target memory such that the processor can then access its target memory in addition to its own memory. This configuration remains stable until any processor requests a memory outside of the current configuration or the processor associated with the target memory requests its own memory again. Advantageously, the bus control uses an arbitration table which provides equitable access to all memories.

REFERENCES:
patent: 4209839 (1980-06-01), Bederman
patent: 4495567 (1985-01-01), Treen
patent: 4760521 (1988-07-01), Rehwald et al.
patent: 4807184 (1989-02-01), Shelor
patent: 4837682 (1989-06-01), Culler
patent: 5129093 (1992-07-01), Muramatsu et al.
patent: 5136500 (1992-08-01), Lemay et al.
patent: 5182808 (1993-01-01), Bagnoli et al.
patent: 5237686 (1993-08-01), Asano et al.
patent: 5283870 (1994-02-01), Joyce et al.
patent: 5287485 (1994-02-01), Umina et al.
patent: 5471592 (1995-11-01), Gove et al.

Affiliated with

Also associated with

Rating

System and method for providing high speed memory access in a mu does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for providing high speed memory access in a mu, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for providing high speed memory access in a mu will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-431516