System and method for providing address decode and virtual...

Details System and method for providing address decode and virtual... System and method for providing address decode and virtual...

2011-05-17

2011-10-18

Peyton, Tammara (Department: 2182)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S003000, C710S005000, C710S052000, C711S108000

Reexamination Certificate

active

08041871

ABSTRACT:
The present invention is a method for providing address decode and Virtual Function (VF) migration support in a Peripheral Component Interconnect Express (PCIE) multi-root Input/Output Virtualization (IOV) environment. The method may include receiving a Transaction Layer Packet (TLP) from the PCIE multi-root IOV environment. The method may further include comparing a destination address of the TLP with a plurality of base address values stored in a Content Addressable Memory (CAM), each base address value being associated with a Virtual Function (VF), each VF being associated with a Physical Function (PF). The method may further include when a base address value included in the plurality of base address values matches the destination address of the TLP, providing the matching base address value to the PCIE multi-root IOV environment by outputting from the CAM the matching base address value. The method may further include constructing a requestor ID for the VF associated with the matching base address value, the requestor ID being based upon the output matching base address value and a bus number for a PF which owns the CAM.

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Krause et al, “1/O Virtualization and Sharing”, 2006, Microsoft, pp. 1-26.
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Multi-Root I/O Virtualization and Sharing Revision 0.7, Jun. 8, 2007, pp. 1-231, Publisher: PCI-SIG, Published in:US.

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