System and method for providing a pre-fetch memory controller

Details System and method for providing a pre-fetch memory controller System and method for providing a pre-fetch memory controller

2005-11-29

2005-11-29

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S104000, C711S105000, C711S106000, C711S118000, C711S154000, C711S158000, C710S005000, C710S022000, C710S053000, C710S112000, C710S240000, C710S310000, C710S314000

Reexamination Certificate

active

06970978

ABSTRACT:
A system and method is disclosed for providing a pre-fetch memory controller in a computer system that comprises a plurality of master agents. The memory controller comprises a bus interface, a memory interface and a plurality of pre-fetch queues. In one embodiment each pre-fetch queue is assigned to a master agent. In an alternate embodiment the pre-fetch queues are dynamically assigned to master agents. The bus interface services memory read requests, memory write requests, and pre-fetch requests. Data may be pre-fetched from main memory and stored in the pre-fetch queues. This reduces the latency for memory read requests and improves the efficiency of the memory interface with the main memory.

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