System and method for providing a clock and data recovery...

Details System and method for providing a clock and data recovery... System and method for providing a clock and data recovery...

2004-10-26

2009-06-30

Corrielus, Jean B (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S224000, C327S156000, C714S030000, C714S733000

Reexamination Certificate

active

07555091

ABSTRACT:
A system and method is disclosed for providing a clock and data recovery circuit with a self test capability. A test control unit is provided that causes the clock and data recovery circuit to continuously alter a phase of an interpolated clock signal. A user selects a preselected bit pattern that causes the digital control circuitry of the clock and data recovery circuit to advance or retard the phase of the interpolated clock signal. The test control unit compares the advanced or retarded phase of the interpolated clock signal with a reference clock signal to determine a frequency difference between the two clock signals. The test control unit uses the frequency difference to determine the test status of the clock and data recovery circuit.

REFERENCES:
patent: 6570944 (2003-05-01), Best et al.
patent: 7180352 (2007-02-01), Mooney et al.
patent: 7376528 (2008-05-01), Ribo
patent: 2004/0202266 (2004-10-01), Gregorius et al.
patent: 2006/0233291 (2006-10-01), Garlepp et al.

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